1. Field of the Invention
The present invention relates generally to avionics systems and more particularly to improved switching systems for Avionics Full-Duplex Switched Ethernet (AFDX) systems.
2. Description of the Related Art
Modern onboard avionics networks serve to provide data transfer between various components of an aircraft. Avionics systems typically have a variety of systems that provide data to processing components of the aircraft or exchange data among one or more components of the aircraft. For example, a variety of avionics modules may gather avionics data (e.g., sensors detecting speed, direction, external temperature, control surface positions, and the like) that is routed by the avionics system via an avionics network to one or more aircraft components such as displays, monitoring circuits, processors, and the like.
In some aircraft systems, the avionics network may be constructed with an Aeronautical Radio Inc. (ARINC) 429 data bus capable of supporting communication between many components. More recently, Ethernet networks have been used in avionic network environments by leveraging Commercial Off-The-Shelf (COTS) technology to increase bandwidth and reduce cost.
Ethernet type networks have been used in communication networks for implementing communication among various network components. An Ethernet network may be used to send or route data in a digital form by packets or frames. Each packet contains a set of data, and the packet is generally not interpreted while sent through the Ethernet network. In an avionics network environment, the Ethernet network typically has different components that subscribe to the avionics network and connect to each other through switches. Each network subscriber can send packets in digital form, at controlled rates, to one or more other subscribers. When a switch receives the packets, the switch determines the destination equipment and directs or switches the packets to such equipment.
Such Ethernet networks may include ARINC-664 based networks. In a switched full-duplex Ethernet type network, the term “full-duplex” refers to sending and receiving packets at the same time on the same link, and the term “switched” refers to the packets being switched in switches on appropriate outputs. However, the ARINC-664 network uses multiple switches and redundant paths to route data, point-to-point or point-to-multipoint across the switches.
Avionics Full-Duplex Switched Ethernet (AFDX) is a data network for safety-critical applications that utilizes dedicated bandwidth while providing deterministic Quality of Service (QoS). AFDX is based on IEEE 802.3 Ethernet technology and utilizes Commercial Off-The-Shelf (COTS) components. AFDX is a specific implementation of ARINC Specification 664 Part 7, a profiled version of an IEEE 802.3 network per parts 1 & 2, which defines how Commercial Off-the-Shelf (COTS) networking components will be used for future generation Aircraft Data Networks (ADN). The six primary aspects of AFDX include full duplex, redundancy, deterministic, high speed performance, switched and profiled network.
Certain AFDX data networks require synchronous scheduling for proper operation. For example, U.S. Pat. No. 7,675,919, issued to S. C. Vestal, entitled, “End System Scheduling for Switched Networks,” discloses a method for scheduling one or more data packet transfers over a computer-based distributed network. The method involves constructing a cyclic schedule from a plurality of data packets, wherein the cyclic schedule is constructed to ensure that each data packet transfer is substantially free of jitter. The method further involves synchronizing the cyclic schedule with at least one periodic processing schedule and transmitting the synchronized data packets as arranged by the cyclic schedule.
U.S. Pat. No. 7,787,486, issued to S. C. Vestal, entitled, “Method and System for Achieving Low Jitter in Real-Time Switched Networks,” discloses a method and system for increasing the precision of time synchronization among a plurality of host nodes in a packet-switched network by reducing transmission delay variation in the network. Each host node is provided with a distinct set of transmission times selected from a global schedule in such a way as to avoid concurrent transmission of messages by the plurality of host nodes. The transmission times may be determined as offsets within a global hyperperiod, and each host node carries out transmissions according to predetermined offsets of the respective host node. Transmissions according to offsets may be applied to real-time messages, including time-synchronization messages, hence yielding increased precision of synchronization.
Some networks are designed for asynchronous operation between components. This provides cost savings. However, the physical rate capacity made available to each connected end system is often more than the connected end system requires. For example, an end system using 100 Mbps physical line rate Ethernet may only require an aggregated transmission from the end system of 3 Mbps. In this example the over allocation implies the maximal assumed arrival of data may overestimate the actual arrival making the analysis unduly pessimistic. It is desired that the number of virtual links (VLs) be maximized for a given level of performance.
U.S. Ser. No. 13/533,572, entitled, “DATA NETWORK WITH ‘PER FLOW’ FLOW MONITORING,” filed concurrently herewith, by the applicants, D. A. Miller and D. E. Mazuk, and assigned to the present assignee, discusses the use of ‘per flow’ monitoring in a data network. This co-filed patent application is incorporated by reference herein in its entirety.
U.S. Ser. No. 13/533,265, entitled, “DATA NETWORK WITH CONSTRAINED SWITCH TRANSMISSION RATES,” filed concurrently herewith, by the applicant, D. A. Miller, and assigned to the present assignee, discusses a data network utilizing packet schedulers for managing the transmission of received data flow. A plurality of effective line rate utilization mechanisms are each associated with a respective packet scheduler for providing the service rate of that packet scheduler. A plurality of switch egress ports transmit the received data flow. Each switch egress port has a defined configured effective transmission rate. Each effective line rate utilization mechanism reduces the utilization rate to the defined configured effective transmission rate. This co-filed patent application is incorporated by reference herein in its entirety. processor 116 can be any hardware and/or software processor or processing architecture capable of executing instructions and operating on data related to the radar returns.